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LAN8830 Gigabit Ethernet Transceivers with RGMII LAN8830/PSA

LAN8830 Gigabit Ethernet Transceivers with RGMII are integrated, triple-speed (10Base-T/100Base-TX/1000Base-T) Ethernet physical-layer transceivers designed for transmission and reception of data on standard CAT-5, CAT-5e, and CAT6 unshielded twisted pair (UTP) cables. LAN8830 features an RGMII (Reduced Gigabit Media Independent Interface) for connecting Ethernet switches, microcontrollers, or microprocessors. Furthermore, an embedded Ethernet Media Access Controller (MAC) supplying the RGMIII interface for data transfer at 1000Mbps or 10/100Mbps.

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LAN8830 Gigabit Ethernet Transceivers with RGMII LAN8830/PSA

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LAN8830 Gigabit Ethernet Transceivers with RGMII

The LAN8830 transceivers reduce board cost and simplify board layout by using on-chip termination resistors for the four differential pairs. Also, the LAN8830 integrates an LDO controller to drive a low-cost MOSFET supplying the 1.2V core.

The devices provide diagnostic features to implement system bring-up and debugging in production testing and product deployment. Parametric NAND tree support allows fault detection between the LAN8830 I/Os and the board. The LinkMD® TDR-based cable diagnostic identifies faulty copper cabling. The remote and local loopback functions verify analog and digital data paths.

The LAN8830 is engineered in a RoHS-compliant, 48-pin QFN package.

FEATURES

Single-chip 10/100/1000Mbps Ethernet transceiver suitable for IEEE 802.3 applications
RGMII with 3.3V/2.5V/1.8V tolerant I/Os
- RGMII Timing supports on-chip delay according to RGMII Version 2.0 with programming options for the external delay and making adjustments/corrections to TX and RX timing paths
Auto-negotiation to automatically select the highest link-up speed (10/100/1000Mbps) and duplex (Half/Full)
On-chip termination resistors for the differential pairs
On-chip LDO controller to support single 3.3V supply operation – requires only one external FET to generate 1.1V for the core
Jumbo frame support up to 16KB
125MHz Reference clock output
Energy-detect power-down mode for reduced power consumption when the cable is not attached
Energy Efficient Ethernet (EEE) support with Low-Power Idle (LPI) mode and clock stoppage for 100BASE-TX/1000BASE-T and transmit amplitude reduction with 10BASE-Te option
Wake-On-LAN (WOL) support with robust custom-packet detection
Signal quality indication

Programmable LED outputs for link, activity, and speed
LinkMD® TDR-based cable diagnostic to identify faulty copper cabling
Parametric NAND tree support to detect faults between chip I/Os and board
Loopback modes for diagnostics
Automatic MDI/MDI-X crossover to detect and correct pair swap at all speeds of operation
Automatic detection and correction of pair swaps, pair skew, and pair polarity
MDC/MDIO Management interface for PHY register configuration
Interrupt pin option
Power-down and power-saving modes
Operating voltages
- 1.1V (External FET or regulator) Core (VDD, VDDAL, VDDAL_PLL)
- 3.3V, 2.5V, or 1.8V VDD I/O (VDDIO)
- 3.3V or 2.5V Transceiver (VDDAH)
Available in commercial (0°C to +70°C) and extended industrial (-40°C to +105°C) temperature ranges
48-pin VQFN (7mm × 7mm) Package